In the field of data transmission by which digital data representing various kinds of signal information are transmitted, there have been proposed to subject digital data set to be transmitted to enciphering process at a transmission side and to reproduce original data by subjecting the enciphered digital data to deciphering process at a receiving side, in order to prevent the digital data from being eavesdropped on a data transmission line. One of typical algorisms for enciphering digital data is the DES (Date Encryption Standard) published in 1977 by the National Bureau of Standards, the United State of America.
With cipher-transmission based on the DES, digital data are enciphered in accordance with rules determined by enciphering key data prepared previously to produce enciphered digital data and the enciphered digital data are deciphered in accordance with rules determined by deciphering key data prepared previously to reproduce original digital data. The deciphering key data are prepared to be the same as the enciphering key data so that each of the deciphering key data and the enciphering key data are formed with common data. The algorisms for enciphering and deciphering have been opened to the public and the common key data are kept secret for the purpose of enciphering.
FIG. 1 shows a basic structure of a cipher-transmission system according to the DES. In the basic structure shown in FIG. 1, digital data to be transmitted are supplied to a DES enciphering portion 11 as original data. Enciphering key data prepared previously are also supplied to the DES enciphering portion 11. In the DES enciphering portion 11, the original data are subjected to the DES enciphering process in accordance with the rules determined by the enciphering key data to produce enciphered data. The enciphered data obtained from the DES enciphering portion 11 are transmitted through a data transmission line 12 having one end thereof connected with the DES enciphering portion 11.
The enciphered data having been transmitted through the data transmission line 12 are supplied to a DES deciphering portion 13 with which the other end of the data transmission line 12 is connected. Deciphering key data which is the same as the enciphering key data are also supplied to the DES deciphering portion 13. In the DES deciphering portion 13, the enciphered data are subjected to the DES deciphering process in accordance with the rules determined by the deciphering key data to reproduce the original data.
In the field of video signals, digitalization of video signals has been aimed for actualizing diversification in information to be transmitted, improvements in quality of images reproduced from the video signal and so on. For example, there has been proposed the High Definition Television (HDTV) system which uses a digital video signal composed of digital word sequence data representing video signal information. The digital video signal under the HDTV system (hereinafter, referred to the HD signal) is formed in accordance with, for example, the BTA S-002 which is one of a series of standards established by the Broadcasting Technology Association (BTA) in Japan so as to be in the form of Y and PB/PR signals or G, B and R signals. In the case of the Y and PB/PR signals, Y represents a luminance signal and PB/PR represent color difference signals. In the case of the G, B and R signals, G, B and R represent green, blue and red primary color signals, respectively.
The HD signal is a digital television signal by which each frame picture is formed with first and second field pictures each appearing at a rate of 60 Hz and which is constituted in accordance with an arrangements including a frame rate of 30 Hz, 1125 lines per frame, 2,200 data samples per line and a sampling frequency of 74.25 MHz. For example, the HD signal in the form of Y and PB/PR signals is constituted in accordance with such data formats as shown in FIGS. 2A and 2B.
The data formats shown in FIGS. 2A and 2B include a part of a portion corresponding to a line period (hereinafter, referred to a line period portion) of a luminance signal data sequence (hereinafter, referred to a Y data sequence) as shown in FIG. 2A, which represents a luminance signal component of a video signal, and a part of a line period portion of a color difference signal data sequence (hereinafter, referred a PB/PR data sequence) as shown in FIG. 2B, which represents color difference signal components of the video signal. Each of data words constituting the Y data sequence or the PB/PR data sequence is composed of 10 bits. This means that each of the Y data sequence and the PB/PR data sequence constitutes 10-bit word sequence data having a word transmission rate of, for example, 74.25 Mwps.
In the Y data sequence, each line period portion of which is formed with a portion corresponding to a horizontal blanking period and a portion corresponding to a video data period appearing after the horizontal blanking period, time reference code data SAV (Start of Active Video) which are composed of four 10-bit words (3FF(Y), 000(Y), 000(Y), XYZ(Y); 3FF and 000 are hexadecimal numbers and (Y) indicates a word contained in the Y data sequence) are provided just before the portion corresponding to the video data period and another time reference code data EAV (End of Active Video) which are composed of four 10-bit words (3FF(Y), 000(Y), 000(Y), XYZ(Y)) are provided just after the portion corresponding to the video data period. Similarly, in the PB/PR data sequence, each line period portion of which is formed with a portion corresponding to a horizontal blanking period and a portion corresponding to a video data period appearing after the horizontal blanking period, time reference code data SAV which are composed of four 10-bit words (3FF(C), 000(C), 000(C), XYZ(C); (C) indicates a word contained in the PB/PR data sequence) are provided just before the portion corresponding to the video data period and another time reference code data EAV which are composed of four 10-bit words (3FF(C), 000(C), 000(C), XYZ(C)) are provided just after the portion corresponding to the video data period. The time reference code data EAV and SAV contained in the Y data sequence are provided in the portion corresponding to the horizontal blanking period of the Y data sequence and the time reference code data EAV and SAV contained in the PB/PR data sequence are provided in the portion corresponding to the horizontal blanking period of the PB/PR data sequence.
Initial three 10-bit words (3FF, 000, 000) of four 10-bit words (3FF, 000, 000, XYA), each of which is shown with (Y) or (C), are used for establishing word synchronization or line synchronization and a last one 10-bit word (XYZ) of four 10-bit words (3FF, 000, 000, XYA), which is also shown with (Y) or (C), is used for discriminating the first field from the second field in each frame or for discriminating the time reference code data EAV from the time reference code data SAV.
Line number data LN0(Y) and LN1(Y) or LN0(C) and LN1 (C) which represent a line number of each of lines constituting each frame, error detecting code data YCR0 and YCR1 or CCR0 and CCR1 and ancillary data YA0, YA1, . . . , YA267 or CA0, CA1, . . . CA267 which include audio data and so on are provided between the time reference code data EAV and the time reference code data SAV in each horizontal blanking period of each of the Y data sequence and the PB/PR data sequence.
When the HD signal constituted with the Y data sequence and the PB/PR data sequence is subjected to transmission through a data transmission line, it is desired for the HD signal to be converted to serial data from word sequence data so as to be subjected to serial transmission through a simplified data transmission line. In connection with the serial transmission of the HD signal constituted with the Y data sequence and the PB/PR data sequence, it has been standardized to transmit the HD signal in conformity with the HD SDI (High Definition Serial Digital Interface) according to the BTA S-004 which is one of a series of standards established by the BTA in Japan.
In the transmission of the HD signal in conformity with the HD SDI, the Y data sequence and the PB/PR data sequence are multiplexed, with their portions corresponding to the horizontal blanking periods in each of which the time reference code data EAV and SAV are provided and which synchronize with each other, to produce a multiple word sequence as shown in FIG. 3 and then the multiple word sequence is converted to serial data to be transmitted. Each of data words constituting the multiple word sequence shown in FIG. 3 is composed of 10 bits and the word transmission rate of the multiple word sequence shown in FIG. 3 is set to be 74.25 Mwps×2=148.5 Mwps. In the multiple word sequence thus obtained as shown in FIG. 3, multiple time reference code data (multiple SAV) which are composed of eight 10-bit words (3FF(C), 3FF(Y), 000(C), 000(Y), 000(C), 000(Y), XYZ(C), XYZ(Y)) are provided just before the portion corresponding to a video data period and another multiple time reference code data EAV (multiple EAV) which are composed of eight 10-bit words (3FF(C), 3FF(Y), 000(C), 000(Y), 000(C), 000(Y), XYZ(C), XYZ(Y)) are provided just after the portion corresponding to the video data period.
The each of the 10-bit words constituting the multiple word sequence is sent bit by bit from the least significant bit (LSB) to the most significant bit (MSB) so that the multiple word sequence is converted to a serial data. Then, the serial data is subjected to scrambling process to produce a serial transmission HD signal (hereinafter, referred to an HD-SDI signal) and the HD-SDI signal is transmitted through a data transmission line. The HD-SDI signal thus transmitted has a bit transmission rate of, for example, 148.5 Mwps×10=1.485 Gbps.
In the case of the transmission of the HD-SDI signal through the data transmission line, it is also desired to subject the HD-SDI signal to enciphering process at a transmission side and to reproduce original HD-SDI data by subjecting the enciphered HD-SDI data to deciphering process at a receiving side, in order to prevent the HD-SDI data from being eavesdropped on the data transmission line. Such cipher-transmission of the HD-SDI signal can be theoretically carried out with a cipher-transmission system which is similar to the cipher-transmission system according to the DES having the basic structure shown in FIG. 1.
For example, when an HD signal is converted to an HD-SDI signal in accordance with the HD SDI to be transmitted through a data transmission line and the transmitted HD-SDI signal is reconverted to the HD signal in accordance with the HD SDI to be supplied to, for example, a video projector which operates to display images based on the HD signal, it is considered to have such a cipher-transmission system as shown in FIG. 4 for conducting the cipher-transmission of the HD-SDI signal.
In the cipher-transmission system shown in FIG. 4, an HD-SDI signal DHS derived from an HD-SDI signal generating portion 15, in which an HD signal obtained from a video camera or the like is converted to the HD-SDI signal DHS in accordance with the HD SDI, is supplied to an HD-SDI enciphering portion 16. Key data DEK prepared previously are also supplied to the HD-SDI enciphering portion 16. In the HD-SDI enciphering portion 16, the HD-SDI signal DHS is first subjected to serial to parallel (S/P) conversion to reproduce the original HD signal constituted with Y and PB/PR data sequences and the reproduced HD signal is subjected to the DES enciphering process in accordance with the rules determined by the key data DEK to produce an enciphered HD signal. Then, in the HD-SDI enciphering portion 16, the enciphered HD signal is subjected to parallel to serial (P/S) conversion to produce enciphered serial data DHSE.
When the enciphered HD signal is produced by subjecting the HD signal to the DES enciphering process, for example, video data DVV which are provided in a portion corresponding to a video data period and time reference code data EAV which are provided in a starting end of a portion corresponding to a horizontal blanking period successive to the portion corresponding to the video data portion in a portion corresponding to a line period of an HD signal constituted with Y and PB/PR data sequences shown in FIGS. 2A and 2B, as shown in FIG. 5, are subjected to the DES enciphering process to produce an enciphered video data. On the other hand, various data provided in the portion corresponding to the horizontal blanking period except the time reference code data EAV, that is, line number data DLN representing a line number varying line by line, error detecting code data CRCC, ancillary data DAA including audio data, and time reference code data SAV, are not subjected to the DES enciphering process but combined with the enciphered video data. As a result, the enciphered HD signal which contains the various data provided in the portion corresponding to the horizontal blanking period except the time reference code data EAV and the enciphered video data successive to the various data is obtained.
The enciphered serial data DHSE are sent from the HD-SDI enciphering portion 16 to be transmitted through a data transmission line 17 having one end thereof connected with the HD-SDI enciphering portion 16.
The enciphered serial data DHSE having been transmitted through the data transmission line 17 are supplied to an HD-SDI deciphering portion 18 with which the other end of the data transmission line 17 is connected. Key data DEK which is the same as the key data DEK supplied to the HD-SDI enciphering portion 16 are also supplied to the HD-SDI deciphering portion 18. In the HD-SDI deciphering portion 18, the enciphered serial data DHSE are subjected to the S/P conversion to reproduce the enciphered HD signal constituted with the enciphered Y and PB/PR data sequences each containing the enciphered video data and the HD signal is subjected to the DES deciphering process in accordance with the rules determined by the key data DEK to reproduce the original HD signal constituted with Y and PB/PR data sequences.
When the HD signal constituted with Y and PB/PR data sequences is reproduced by subjecting the enciphered HD signal to the DES deciphering process, for example, the enciphered video data in the portion corresponding to the horizontal blanking period of the enciphered HD signal are subjected to the DES deciphering process to reproduce the original video data DVV and time reference code data EAV. On the other hand, the various data provided in the portion corresponding to the horizontal blanking period except the time reference code data EAV, that is, the line number data DLN representing the line number varying line by line, the error detecting code data CRCC, the ancillary data DAA including the audio data, and the time reference code data SAV, are not subjected to the DES deciphering process but extracted as they are to be combined with the reproduced video data and time reference code data EAV. As a result, the original HD signal as shown in FIG. 5 is obtained.
Then, in the HD-SDI deciphering portion 18, the Y and PB/PR data sequences constituting the reproduced HD signal are multiplexed with each other in accordance with the HD SDI to produce a word multiple data sequence and the word multiple data sequence thus obtained are subjected to the P/S conversion to reproduce the HD-SDI signal DHS. The HD-SDI signal DHS obtained from the HD-SDI deciphering portion 18 is supplied to a video projector 19. In the video projector 19, the HD signal is reproduced from the HD-SDI signal DHS and used for display of images.
There have been proposed such enciphering circuits as shown in FIGS. 6, 8 and 10 to be used in the HD-SDI enciphering portion 16 shown in FIG. 4 for subjecting the portion of the HD signal in which the video data DVV and the time reference code data EAV are contained to the DES enciphering process in accordance with the rules determined by the key data DEY and further proposed such deciphering circuits as shown in FIGS. 7, 9 and 11 to be used in the HD-SDI deciphering portion 18 shown in FIG. 4 for subjecting the portion of the enciphered HD signal in which the enciphered video data are contained to the DES deciphering process in accordance with the rules determined by the key data DEY.
The enciphering circuit shown in FIG. 6 is constituted with an enciphering portion 20 to which digital information data DOD in the form of j-bit word sequence data (j represents a positive integer) are supplied as input data and a key data generator 21 operative to supply the enciphering portion 20 with key data DEY. In the enciphering portion 20, the digital information data DOD are subjected to enciphering process in accordance with the rules determined by the key data DEY to produce enciphered digital information data DXD in the form of j-bit word sequence data. The enciphered digital information data DXD are sent from the enciphering portion 20.
The enciphering circuit shown in FIG. 8 is constituted with an enciphering portion 20 to which digital information data DOD in the form of j-bit word sequence data (j represents a positive integer) are supplied as input data, a key data generator 21 operative to send key data DEY, a random number generator 22 and an initial value data generator 23 operative to supply the random number generator 22 with initial value data DIT. The key data DEY obtained from the key data generator 21 are supplied to the random number generator 22.
In the random number generator 22, a register 25 produces register output data DRZ composed of y-bit words (y represents a positive integer larger than j) in response to input data and supplies a cipher producing portion 26 with the register output data DRZ. The initial value data DIT obtained from the initial value data generator 23 are supplied to the register 25.
In the cipher producing portion 26 to which the key data DEY obtained from the key data generator 21 are supplied, the register output data DRZ obtained from the register 25 are subjected to enciphering process in accordance with the rules determined by the key data DEY to produce cipher data DEZ composed of y-bit words. The cipher data DEZ are sent from the cipher producing portion 26 to a bit extracting portion 27. In the bit extracting portion 27, j bits of each of the y-bit words constituting the cipher data DEZ are extracted successively to produce pseudo-random number data DXA composed of i-bit words. The pseudo-random number data DXA obtained from the bit extracting portion 27 are sent from the random number generator 22 to be supplied to the enciphering portion 20.
Incidentally, the random number generator 22 may produce genuine random number data in place of the pseudo-random number data DXA. In such a case, the genuine random number data are sent from the random number generator 22 to be supplied to the enciphering portion 20.
In the enciphering portion 20, the digital information data DOD are subjected to enciphering process responding to the pseudo-random number data DXA or the genuine random number data obtained from the random number generator 22 to produce enciphered digital information data DXD in the form of j-bit word sequence data. The enciphered digital information data DXD thus obtained on the basis of the digital information data DOD are sent from the enciphering portion 20.
The enciphered digital information data DXD sent from the enciphering portion 20 are supplied to a bit number converting portion 28 in the random number generator 22. In the bit number converting portion 28, the enciphered digital information data DXD are converted to feedback data DFD in the form of y-bit word sequence data. The feedback data DFD obtained from the bit number converting portion 28 are fed back to the register 25 as the input data.
The register 25 is operative first to send the register output data DRZ obtained in response to the initial value data DIT obtained from the initial value data generator 23 and then to send the register output data DRZ obtained in response to the feedback data DFD obtained from the bit number converting portion 28.
The enciphering circuit shown in FIG. 10 is constituted in almost the same manner as the enciphering circuit shown in FIG. 8 but any portion corresponding to the bit number converting portion 28 shown in FIG. 8 is not provided in a random number generator 22. With such arrangements, enciphered digital information data DXD obtained from an enciphering portion 20 are not supplied to the random number generator 22 and cipher data DEZ obtained from a cipher producing portion 26 are supplied to a bit extracting portion 27 and further fed back to a register 25 as input data in the enciphering circuit shown in FIG. 10. The overall operation of the enciphering circuit shown in FIG. 10 is almost the same as that of the enciphering circuit shown in FIG. 8.
The deciphering circuit shown in FIG. 7 is constituted with a deciphering portion 30 to which the enciphered digital information data DXD in the form of i-bit word sequence data obtained from the enciphering circuit shown in FIG. 6 are supplied as input data and a key data generator 31 operative to supply the deciphering portion 30 with key data DEY. In the deciphering portion 30, the enciphered digital information data DXD are subjected to deciphering process in accordance with the rules determined by the key data DEY to reproduce the original digital information data DOD in the form of j-bit word sequence data. The reproduced original digital information data DOD are sent from the deciphering portion 30.
The deciphering circuit shown in FIG. 9 is constituted with a deciphering portion 30 to which the enciphered digital information data DXD in the form of j-bit word sequence data obtained from the enciphering circuit shown in FIG. 8 are supplied as input data, a key data generator 31 operative to send key data DEY, a random number generator 32 and an initial value data generator 33 operative to supply the random number generator 32 with initial value data DIT. The key data DEY obtained from the key data generator 31 are supplied to the random number generator 32.
The random number generator 32 is constituted with a register 25, a cipher producing portion 26, a bit extracting portion 27 and a bit number converting portion 28, in almost the same manner as the random number generator 22 shown in FIG. 8, to supply the deciphering portion 30 with pseudo-random number data DXA. However, the enciphered digital information data DXD which are supplied to the deciphering portion 30 are supplied to the bit number converting portion 28 and output data (DFD) obtained from the bit number converting portion 28 are supplied to the register 25 as input data from the outside. The key data generator 31 and the initial value data generator 33 correspond to the key data generator 21 and the initial value data generator 23 shown in FIG. 8, respectively.
Incidentally, the random number generator 32 may produce genuine random number data in place of the pseudo-random number data DXA. In such a case, the genuine random number data are sent from the random number generator 32 to be supplied to the deciphering portion 30.
In the deciphering portion 30, the enciphered digital information data DXD are subjected to deciphering process in response to the pseudo-random number data DXA or the genuine random number data obtained from the random number generator 32 to reproduce the original digital information data DOD. The reproduced digital information data DOD thus obtained on the basis of the enciphered digital information data DXD are sent from the deciphering portion 30.
The deciphering circuit shown in FIG. 11 is constituted to include a deciphering portion 30, to which the enciphered digital information data DXD in the form of i-bit word sequence data obtained from the enciphering circuit shown in FIG. 10 are supplied as input data, in almost the same manner as the deciphering circuit shown in FIG. 9 but any portion corresponding to the bit number converting portion 28 shown in FIG. 9 is not provided in a random number generator 32. With such arrangements, enciphered digital information data DXD supplied to the deciphering portion 30 are not supplied to the random number generator 32 and cipher data DEZ obtained from a cipher producing portion 26 are supplied to a bit extracting portion 27 and further fed back to a register 25 as input data in the deciphering circuit shown in FIG. 11. The overall operation of the deciphering circuit shown in FIG. 11 is almost the same as that of the deciphering circuit shown in FIG. 9.
Supposing that difficulty in deciphering enciphered digital information data which are obtained by subjecting digital information data to enciphering process is referred to cipher strength, the larger the cipher strength is, the more it is desirable in cipher-transmission of the digital information data for the purpose of enciphering.
In the case where the enciphering circuit shown in FIG. 6 is used, when a condition in which the contents of the digital information data DOD as the input data remain unchanged continues, the contents of the enciphered digital information data DXD also remain unchanged. On the other hand, in the case where the enciphering circuit shown in FIG. 8 or 10 is used, when a condition in which the contents of the digital information data DOD as the input data remain unchanged continues, the contents of the enciphered digital information data DXD are prevented from remaining unchanged because the feedback data DFD or the cipher data DEZ are fed back to the register 25 in the random number generator 22.
This means that the cipher strength of the enciphering circuit shown in FIG. 8 or 10 is larger than that of the cipher strength of the enciphering circuit shown in FIG. 6. Accordingly, it is desirable to use the enciphering circuit shown in FIG. 8 or 10 for subjecting the HD signal to the enciphering process in the cipher-transmission of the HD-SDI signal.
When the enciphering circuit shown in FIG. 8 or 10 is used for subjecting the HD signal to the enciphering process to produce the enciphered HD signal, the deciphering circuit shown in FIG. 9 or 11 is used for subjecting the enciphered HD signal to the deciphering process to reproduce the original HD signal. In such a case, since it is necessary for the enciphering circuit shown in FIG. 8 or 10 and the deciphering circuit shown in FIG. 9 or 11 to generate the same pseudo-random number data DXA or genuine random number data at the same time, respectively, the initial value data DIT which are supplied from the initial value data generator 23 to the register 25 in the random number generator 22 of the enciphering circuit shown in FIG. 8 or 10 and the initial value data DIT which are supplied from the initial value data generator 33 to the register 25 in the random number generator 32 of the deciphering circuit shown in FIG. 9 or 11 are fixed to represent the same value.
Then, when the enciphering circuit shown in FIG. 8 or 10 is used for subjecting the HD signal to the enciphering process, the operation of the random number generator 22 is reset at each line period of the HD signal which is to be enciphered in consideration of the possibility of erroneous transmission of the serial data obtained by subjecting the enciphered HD signal to the P/S conversion. Consequently, in the case where the enciphering circuit shown in FIG. 8 is used, the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each line period of the HD signal which is to be enciphered when the HD signal represents, for example, unicolored images, and in the case where the enciphering circuit shown in FIG. 10 is used, the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each line period of the HD signal which is to be enciphered regardless of images represented by the HD signal.
When the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each line period of the HD signal which is to be enciphered as mentioned above, it comes to be easy to assume the contents of the original HD signal on the strength of the enciphered HD signal and therefore reduction in the cipher strength is brought about.
Further, in the case where the enciphering circuit shown in FIG. 8 is used, the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each frame period of the HD signal which is to be enciphered when a plurality of successive frame periods of the HD signal represent, for example, the same still images, and in the case where the enciphering circuit shown in FIG. 10 is used, the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each frame period of the HD signal which is to be enciphered regardless of images represented by the HD signal.
When the same pseudo-random number data DXA or genuine random number data are obtained from the random number generator 22 at each frame period of the HD signal which is to be enciphered as mentioned above, it comes to be easy to assume the contents of the original HD signal on the strength of the enciphered HD signal and therefore reduction in the cipher strength is brought about also.
Accordingly, it is an object of the present invention to provide an apparatus for enciphering data in which digital information data having a series of data partitions, such as an HD signal which is obtained by subjecting an HD-SDI signal to S/P conversion, are subjected to enciphering process in response to key data or enciphering process in response to random number data or pseudo-random number data produced on the basis of the key data, for producing enciphered digital information data, and by which the cipher strength of the enciphered digital information data can be surely improved.
Another object of the present invention is to provide an apparatus for deciphering data by which enciphered digital information data which are obtained by subjecting digital information data to such enciphering process as to produce enciphered data having the improved cipher strength can be subjected to deciphering process for reproducing the original digital information data having a series of data partitions, such as an HD signal which is obtained by subjecting an HD-SDI signal to S/P conversion.